Design and Productization of Highly-Integrated Low-Cost Mixed-Signal SoCs

Design and Productization of Highly-Integrated Low-Cost Mixed-Signal SoCs

This course covers many of the challenges associated with the design of RF transceivers in advanced CMOS processes and their integration with the digital and power-management functions that are typically found in today’s highly complex system-on-chip (SoC) products targeting the consumer market. An overview of extensively digital architectures that have been developed in recent years is presented and references are provided for specific related topics, such as digital transmitters and receivers, design methodologies and modeling, and power management considerations.

The challenges associated with parasitic self-interference and noise, as well as with the low-cost mass-productization of such SoCs, are discussed in length, using multiple examples. These include self-calibration/compensation (“self healing”), characterization, and final-testing at production, relying extensively on built-in-self-testing (BiST). Although the examples are primarily from wireless transceivers, many of the principles are widely applicable to other types of mixed signal SoCs as well.

Currently Scheduled Course Dates

  • Jan 22, 2011 - Dallas, TX
  • Jan 21, 2011 - Austin, TX

What you’ll learn from this course

  • Understand architectural considerations and tradeoffs associated with integrated transceivers
  • Modeling considerations
  • Anticipating and coping with post-silicon self-interference problems
  • Designing for high-yield and low-cost testing in massproduction

Course Prerequisites

  • Basic understanding of transceiver architectures at the block level
  • Basic understanding of productization constraints and considerations (preferable, but not mandatory)


  • Transceiver architecture considerations for low-cost highly complex system-on-chip (SoC) products
    • Overview of modulation schemes and communication standards and their derived requirements
    • Digital transceiver architectures
    • Integration considerations
  • Self-calibration/compensation (“self healing”)
    • Defining internal measurements and compensation/calibration criteria
    • Designing for built-in self-calibration/compensation
  • Low-cost final testing relying on built-in-self-testing for mixed-signal functions
    • The statistics of test reliability (defective parts per million – DPPM) and yield
    • Built-in self-testing
    • Designing test criteria and associating these with performance specifications
  • Self-interference problems and solutions
    • Defining and categorizing self-interference mechanisms
    • Accounting for self-interference mechanisms at the design phase
    • Coping with self-interference post-silicon
    • Examples of self interference problems and solutions
  • Advanced topics in radio design and productization

Sample slides

Who Should Attend

  • System-level engineers
  • RF/mixed-signal designers
  • Product/test engineers
  • New college graduates (MSEE or PhD)
  • Experienced engineers transitioning into this field
  • Managers of design/testing engineers

Course Materials

  • A hardcopy of the "Presentation materials" will be included as part of the course.

Instructor's Profile: Dr. Oren Eliezer

Dr. Oren Eliezer received his Bachelor’s and Master’s degrees in Electrical Engineering from the Tel-Aviv University in Israel in 1988 and 1996 respectively, majoring in communication theory and communication system design. He received his PhD from the University of Texas at Dallas in 2008, majoring in microelectronics. He started his engineering career in wireless communications in the Israeli military in 1988, designing and deploying sophisticated wireless communication systems. In 1994 he confounded the startup Butterfly, focusing on low-cost consumer-market wireless solutions, and served as its chief engineer. He joined Texas Instruments (TI) in 1999, with their acquisition of Butterfly, was relocated to Dallas in 2002, and became a senior member of the technical staff in the Wireless Terminals Business Unit of TI, where he was a key member of the team that revolutionized wireless transceiver integration in digital CMOS processes, with the introduction of TI’s Digital-RF-Processor (DRPTM) technology. He has extensive experience in radio architecture, software-defined radios, interference and coexistence issues, and radio testing and manufacturability. In particular, he has specialized in built-in testing, characterization, compensation and calibration techniques, and has published extensively in these fields. He has authored and coauthored over 30 patents and over 30 conference and journal papers, and has given over 20 invited talks and seminars. He is currently the CTO at Xtendwave, a Dallas based startup specializing in extending the reach and the data throughput of digital communication systems, and is also involved in the research of low-cost mm-wave applications at the Texas Analog Center of Excellence (TxACE) at the University of Texas at Dallas (UTD).

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