Designing an IC- Concepts through Implementations

This course is designed to illustrate the Flows and Phases involved in a typical IC design cycle. Most of the design engineers are involved with few steps of the design cycle. This course will provide a high-level overview of the entire design flow, utilizing a "popular microprocessor" as a reference design. Commonly used "commercial EDA tools" and PDK (Process Design Kits) components/ terminology used at various phases of the design will be explained with simplified “real world” examples.

Currently Scheduled Course Dates

• Jan 27, 2011 - Dallas, TX

What you’ll learn from this course

• High-level understanding of each phases of an IC Design flow.
• Simplified explanations of EDA tools and PDK components used at various phases of the design.

Note- This is an introductory course with high-level overview. This course will be followed by several "implementation" courses addressing the issues/ techniques involved with various phases/ styles of IC design.

Course Prerequisite

• Basic EE/ CS graduate level understandings

Overview of the course

• Design Methodology for High-end Microprocessors
  • Design Methodology for Custom processor over standard processor
  • Full custom vs. standard cell based design
• Top Down concepts
  • Fundamentals of Top Down concepts
  • Case study- “Cell” processor
• Bottom Up Implementations
  • Case study- Multiplier
• Essential Supporting Elements for IC Design
  • EDA
  • PDK
• Major EDA vendors/Tools at various phases of the design
  • Tools from Major EDA vendors
  • Competitive/ promising tools from small vendors/startups
  • Gaps in design needs and tool availability
• Wrap-up
  • Topics not covered
  • Exploring Further

Sample slides

• Be added soon

Who Should Attend

• Project Manager
• Platform Manager
• Semiconductor professionals transitioning to design (e.g.- Product/ Test Engineer., Process Engineer, PDK- Moving to design).
• Anyone involved with some phases of IC design ( e.g.- Verification, RTL, Synthesis, Physical design, Layout, Analog and RF design, EDA, PDK) - Expand understanding with all phases of the design flow
• Anyone Involved with semiconductor industry (e.g.- Design, Process, Product/ Test Engineering)- Widen the Horizon
• Technical recruiters in semiconductor field- Simplified the IC/ Semiconductor related "technical jargons" with simple illustration.
• Technical Writers
• System Engineers
• New college graduates (BS, MS or PhD)

Course Materials

• A hardcopy of the "Presentation materials" will be included as part of the course.

Instructor's Profile: Faizul Alam

Faizul Alam is the CTO and Co-Founder of CatalyteIC, a leading provider of “IC Design/Methodology” and “High-end IC Design Training” Services. He has 15+ years of experience with various aspects of Physical Design (PD) – Process Design Kit (PDK) / Physical Verification (PV) infrastructure development, Parasitic Extraction, Tools, Methodologies and Implementations. Faizul worked for TI between 2004 and 2009, leading the PDK developments at advanced process nodes (Deck quality, QC automation, iPDK, DFM etc. for 65 nm, 45 nm and 28 nm technology). Prior to TI, Faizul worked for IBM as “Custom Physical Design Methodology" Lead- responsible for the tools, infra-structure and verification for “Cell” Processor, for STI (Sony-Toshiba-IBM) design center.

Faizul published/presented 10+ papers in major conferences including ICCAD, CDNLive and ACEED. He holds two Master’s degree (ECE and EEE) from University of Florida and Bangladesh University of Engineering and Technology (BUET), respectively. He is a senior member of IEEE.