|DFT Beyond Scan|
DFT Beyond Scan
This course is a survey of some of the big tools in the DFT engineers' tool belt. You'll get the why and the how of things like scan, functional tests, memory BIST, logic BIST, and JTAG. We'll talk about and analyze the cost benefits of these test techniques and identify product situations where they represent a positive ROI.
Currently Scheduled Course Dates
What you'll learn from this course
You will take away a comprehensive knowledge of the pillars of DFT. You will understand the benefits of scan not only for manufacturing test but also for burnin, debug, and bring up efforts. You will understand the value of Built-In Self Test techniques and when they are cost appropriate to use. You will get an up close bit-banging look at JTAG and why is has become the sweetheart of the DFT world. This knowledge will enable you to step up and become the DFT architect; making the decisions for test, burnin, and debug resources that make a chip testable and debuggable for the right cost.
Overview of the course
Who Should Attend
Instructor's Profile: Dr. Molyneaux
Dr. Molyneaux was the principal DFT architect for the world-class family of PowerPC chips at the Somerset Design Center, as well as the paradigm changing SUN Microsystems Niagara family of multi-core, multi-threaded processors.