Faizul Alam

Faizul Alam is a Senior Member of Technical Staff (SMTS) of CatalyteIC, a leading provider of “IC Design/Methodology” and “High-end IC Design Training” Services. He has 15+ years of experience with various aspects of Physical Design (PD) – Process Design Kit (PDK) / Physical Verification (PV) infrastructure development, Parasitic Extraction, Tools, Methodologies and Implementations. Faizul worked for TI between 2004 and 2009, leading the PDK developments at advanced process nodes (Deck quality, QC automation, iPDK, DFM etc. for 65 nm, 45 nm and 28 nm technology). Prior to TI, Faizul worked for IBM as “Custom Physical Design Methodology" Lead- responsible for the tools, infra-structure and verification for “Cell” Processor, for STI (Sony-Toshiba-IBM) design center.

Faizul published/presented 10+ papers in major conferences including ICCAD, CDNLive and ACEED. He holds two Master’s degree (ECE and EEE) from University of Florida and Bangladesh University of Engineering and Technology (BUET), respectively. He is a senior member of IEEE.