Paul Hylander

Paul Hylander is an expert in the design and verification of integrated circuits and has over 15 years of experience in leading companies such as HP and Cadence Design Systems as well as several cutting-edge startups. At HP, he provided technical direction to a team of engineers to develop state-of-the-art microprocessors and ASICs for HP high-end computers. As an architect during his tenure at Cadence Design Systems, Paul was responsible for one of Cadence’s industry-leading verification tools. In addition, Paul was responsible for working with top-tier customers such as Intel and Texas Instruments.

Paul was a founder of Nucleus Logic, where he held the CTO position and was responsible for the architecture, and initial implementation of their core-logic integrated networking ASICs. Prior to Nucleus Logic, Paul was with Archway Digital Solutions, where he was the verification lead for a Gigabit TCP/IP offload ASIC and was the architect for the 10Gigabit generation.

Presently, Paul is the Founder and CEO of Hyper Analytix, a verification tools and services company. There he consults on verification projects for leading IC designs. In addition, he is the lead architect and developer for a new generation of verification tools.